If you don’t know how to make something you might need a manual to show you how. But what if there is a gaping hole in the bookshelf where the instruction manual should be?
This is the challenge that Chinese chipmakers face as they try to cultivate a domestic semiconductor industry that can build processors as small as five nanometres (a billionth of a metre). And in this context, the missing manual has the words Electronic Design Automation (EDA) emblazoned on its cover. Without it, China’s chip designers are completely stuck.
EDA technology allows designers to create blueprints for integrated circuits and printed circuit boards. The technology also supports testing, analysis and debugging of the same designs as they move into production. Or as a group of researchers explained in the Journal of Microelectronics recently, EDA is “the bond and the bridge between design and manufacturing” of the most advanced semiconductor chips.
Three American companies dominate the market for EDA. In 2019 Cadence, Synopsys and Mentor (now owned by Siemens and rebranded as Siemens EDA) accounted for 85% of the industry’s $10 billion in global sales.
There are challengers to the status quo from China, although few of them offer a complete design flow. One exception is Huada Empryean, which has developed an end-to-end EDA tool that supports companies in the flat panel display sector. A second firm, Semitronix, offers some yield and testing analysis too. But none of the offerings are enough to challenge the comprehensiveness of companies like Cadence and Synopsys.
Empryean, which derives its name from the ancient Greek for the highest realm of heaven, was founded in 2009. It is reported to be planning a listing in Shenzhen to fund a new round of investment. But like other homegrown EDA firms, it also faces a number of challenges.
Firstly, while China produces plenty of engineers, most go into better-remunerated fields of software application design. China is home to about 1,500 EDA engineers but only 300 of them work for local companies (for comparison, Synopsys has a 7,000-strong R&D team).
Secondly, the Chinese EDA firms are caught in a chicken-and-egg scenario. They can only advance by developing end-to-end tools that embed across the chipmaking process – from design all the way through to linking up with the foundries that make the chips. However, production at foundry leaders like TSMC from Taiwan is already deeply integrated with design technology from the likes of Cadence and Synopsys. This is unlikely to change, not least for geopolitical reasons.
That means domestic EDA companies must partner with local foundries in China in advancing their design skills. But domestic semiconductor plants don’t have the skillsets to make the most advanced chips, in part because the Chinese EDA firms don’t have the tools to facilitate their design.
How could that be remedied? One approach is to pirate the foreign technology. That might work in producing chips for sale to customers that are focused on the Chinese market but it won’t help the larger companies who want to sell their consumer electronics in other countries.
Another tactic is to boost state funding in key R&D, with a focus on pooling the results for national benefit. Empryean already has impressive backers: state-owned China Electronics Corp owns 45% of its shares, while the government’s integrated circuit investment vehicle, known as the Big Fund, has a 14% stake. Yet despite this support, Empryean still trails its international rivals by some distance.
A third hope is that the Chinese firms are starting from a clean slate, allowing them to sidestep the legacy tech that has built up in the commercial EDA tools. Advances in artificial intelligence might also accelerate China’s catch-up process, especially if domestic rivals can be persuaded to share their technical gains across the wider group.
But the international leaders in EDA have their foot on the accelerator here as well. Cadence and Synopsys have both been working on projects with a group of American universities, including efforts to apply machine learning to the country’s EDA archive. That could reduce the complexities and costs of chip design dramatically, especially for the newer, most sophisticated chips, which have billions of transistors. By the time the Chinese achieve the current standards in the sector, the American firms may have moved on to the next generation of design.
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